dc.contributor.author | Hasan, Bakhtawar | |
dc.contributor.author | Shahid, Nabila | |
dc.contributor.author | Suhail, Rabeea | |
dc.contributor.author | Supervised by Dr. Adnan Rashdi | |
dc.date.accessioned | 2020-11-06T07:39:54Z | |
dc.date.available | 2020-11-06T07:39:54Z | |
dc.date.issued | 2012-06 | |
dc.identifier.other | PTC-193 | |
dc.identifier.uri | http://10.250.8.41:8080/xmlui/handle/123456789/10606 | |
dc.description.abstract | Design and development of a standalone Digital Baseband Processing Module has been carried out according to IEEE 802.11a standard. We have considered utilizing the existing resources for developing the Digital baseband module to provide technology self-reliance and import substitution. Implementation of Orthogonal Frequency Division Multiplexing (OFDM) which is a multi carrier modulation technique has been performed that provides high bandwidth efficiency as the carriers are orthogonal to each other and share data among themselves. The complete Verilog code has been developed for the system according to 802.11a standard. The kit that has been used for Hardware Programming is Xilinx Virtex5-LX50T. Prior to downloading onto the Hardware, the code has been thoroughly synthesized and checked using in Xilinx ISE suite v12.3 and the simulation results were validated by comparing with MATLAB simulation. The performance of the baseband processing module has been tested by giving live audio signals as input and recovering the same signal at the other end successfully. | en_US |
dc.language.iso | en | en_US |
dc.publisher | MCS | en_US |
dc.title | Design and development of digital baseband processing module for SDR | en_US |
dc.type | Technical Report | en_US |