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IMPLEMENTATION & EVALUATION OF LOW AREA AND HIGH SPEED DESIGN ARCHITECTURES OF SHA-3 CANDIDATE BLAKE ON AN FPGA PLATFORM
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| dc.contributor.author | Muhammad Arsalan | |
| dc.date.accessioned | 2021-02-11T03:09:47Z | |
| dc.date.available | 2021-02-11T03:09:47Z | |
| dc.date.issued | 2012-12 | |
| dc.identifier.uri | http://10.250.8.41:8080/xmlui/handle/123456789/22290 | |
| dc.language.iso | en | en_US |
| dc.title | IMPLEMENTATION & EVALUATION OF LOW AREA AND HIGH SPEED DESIGN ARCHITECTURES OF SHA-3 CANDIDATE BLAKE ON AN FPGA PLATFORM | en_US |
| dc.type | Thesis | en_US |
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MS [198]