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"Efficient Algorithm and Hardware Architecture for Neural Spike Detection and Spike Sorting''
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| dc.contributor.author | Tariq, Taimoor | |
| dc.contributor.author | Satti, M. Hashim | |
| dc.date.accessioned | 2022-02-11T05:35:00Z | |
| dc.date.available | 2022-02-11T05:35:00Z | |
| dc.date.issued | 2017 | |
| dc.identifier.uri | http://10.250.8.41:8080/xmlui/handle/123456789/28630 | |
| dc.description.sponsorship | Dr. Awais M Kamboh | en_US |
| dc.language.iso | en | en_US |
| dc.publisher | SEECS, National University of Sciences & Technology | en_US |
| dc.subject | Hardware Architecture- Efficient Algorthm | en_US |
| dc.title | "Efficient Algorithm and Hardware Architecture for Neural Spike Detection and Spike Sorting'' | en_US |
| dc.type | Thesis | en_US |
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BS [835]