Design and Implementation of Unified Approximate Multiplier and Divider

Abstract

Approximate computing targets the intrinsic error resilience of compute-intensive applications for gaining computing efficiency with minimal degradation in the output quality. Arithmetic units constitute the most resources in compute-intensive applications. Among the basic arithmetic units, divider exhibit the highest complexity, therefore, the design of resource-efficient approximate dividers is needed. In this thesis, we propose a unified approximate multiplier and divider (INAxD) design. The proposed design used the lookup-table to determine the approximate divisor-reciprocal. The divisor-reciprocal was then multiplied with the dividend to acquire the quotient. Furthermore, to provide a trade-off between resource efficiency and output quality, the design was rendered error-configurable by the number of approximate divisor-reciprocal bits to be acquired from the lookup-table. Error and hardware characteristics of the proposed design was evaluated by comparing with the accurate restoring divider, Radix-2 SRT divider, Goldschmidt divider and NewtonRaphson divider. For N = 8, the INAxD offered upto to 1.10×, 1.56×−1.89×, 2.67× energy improvement for >0.3% error bias when compared with the accurate dividers (Goldschmidt and Newton-Raphson). The power consumption of the proposed design was also optimal when configurability factor was involved. Finally, we performed application-level evaluation showing that the proposed design enable significant power and area reduction with minimal degradation in the output quality