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ANALYSIS OF DESIGN PARAMETERS ON THE PERFORMANCE OF SC-CP DFE COMMUNICATION SYSTEM

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dc.contributor.author AHMED, AQEEL
dc.date.accessioned 2023-08-25T05:39:40Z
dc.date.available 2023-08-25T05:39:40Z
dc.date.issued 2009
dc.identifier.uri http://10.250.8.41:8080/xmlui/handle/123456789/37459
dc.description Supervisor: DR SHOAB A. KHAN en_US
dc.description.abstract Orthogonal Frequency Division Multiplexing (OFDM) has gained enormous popularity in the recent years due to its inherent ability to counter multipath effects and support high data rates. Its implementation has been made simpler through the efficient calculation of Discrete Fourier Transform (DFT) via the Fast Fourier Transform (FFT) algorithm. However, timing and frequency synchronization issues in OFDM affect its performance severely. In addition, it suffers from high Peak to Average Power ratio (PAPR) at the transmitter and requires the transmitter to operate with a large linear range. To alleviate these problems, a Single Carrier with Frequency Domain Equalization (SC-FDE) is considered which gives performance comparable to OFDM. Timing and frequency synchronization is not a big problem in SC-FDE. Various frequency domain equalizers have been implemented which include Linear Equalizer, Decision Feedback Equalizer (DFE) and Iterative Block DFE. In order to avoid the error propagation phenomenon of the DFEs and to increase the robustness of the Equalizer, block based techniques are proposed. We took an overview of these DFEs, and analyzed the performance of IBDFE under different channel constraints and using different types of PN sequences. The simulations show that how IBDFE perform when training sequences are sent and when they are absent. en_US
dc.language.iso en en_US
dc.publisher College of Electrical & Mechanical Engineering (CEME), NUST en_US
dc.title ANALYSIS OF DESIGN PARAMETERS ON THE PERFORMANCE OF SC-CP DFE COMMUNICATION SYSTEM en_US
dc.type Thesis en_US


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