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DESIGN OF A LOW SIDE LOBE SLOTTED WAVEGUIDE PLANAR ARRAY

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dc.contributor.author DAR, SARA HAMEED
dc.date.accessioned 2023-08-28T09:33:34Z
dc.date.available 2023-08-28T09:33:34Z
dc.date.issued 2007
dc.identifier.uri http://10.250.8.41:8080/xmlui/handle/123456789/37678
dc.description Supervisor: DR.MOJEEB BIN IHSAN en_US
dc.description.abstract Slotted waveguide antennas are very attractive for radar and communication applications. The design of these antennas require design curves, which relate electrical parameters of waveguide slots such as admittances and resonant frequencies to their physical parameters such as slot lengths and slot offsets. These design curves were typically generated by making repeated measurements on fabricated antennas. In this thesis FEM based EM analysis software has been used to generate the required design curves. In particular, design curves have been obtained for broad wall longitudinal radiating slot and broad wall centered-inclined coupling slot in a standard waveguide WR51 and a custom designed waveguide. For radiating slot, design curves like resonant length against slot offset, resonant conductance against slot offset and off-resonance admittance against slot length have been found. For coupling slot; resonant slot lengths and scattering parameters have been found over a range of slot inclination. Using these design curves, various Ku band low side lobe planar array antennas have been designed with Elliot's design procedure. The design procedure requires computationally extensive iterations. A MA TLAB code has been developed for these computations. The performance of the designed antennas has first been checked in an FEM analysis software. Two of the designed antennas have then been fabricated and tested and the measured results show that the performance of antennas is in good agreement with that predicted by simulations. en_US
dc.language.iso en en_US
dc.publisher College of Electrical & Mechanical Engineering (CEME), NUST en_US
dc.title DESIGN OF A LOW SIDE LOBE SLOTTED WAVEGUIDE PLANAR ARRAY en_US
dc.type Thesis en_US


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