Modeling and Analysis of Modified Driver Topology for Switched Reluctance Motor (SRM)

Abstract

Switched Reluctance Motors (SRMs) exhibit significant potential for supplanting conventional motors owing to their advantageous attributes such as a low torque-to-weight ratio, a winding less rotor design, and reduced overall weight. However, the utilization of expensive converters in the electric driver of SRMs, complexity of algorithms for speed regulation, serves as limiting factors for their widespread adoption. This thesis presents a novel Compact Drive Circuit (CDC) characterized by a minimal number of switching devices and fuzzy logic control (FLC) based variable frequency driver (VFD) is implemented for control of 8/6 switched reluctance motors (SRMs). The proposed design utilizes voltage sensor to create a cost-effective and straightforward control system. The feedback voltage is transformed into operational speed, and a modulation index (m) is computed through a devised algorithm. The speed undergoes processing in the FLC, incorporating the oriented speed signal to generate a variable frequency signal based on error and speed membership functions. This generated signal, in conjunction with m, is fed into the VFD, which produces controlled pulse-width modulation signals using a time-delay strategy to attain the desired speed. Furthermore, the paper elucidates the mathematical modeling and operational modes of the CDC. To validate the efficacy of the proposed CDC and minimized FLC-based VFD, simulations were conducted using MATLAB Simulink, and practical experiments were performed on an 8/6 SRM setup.