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Scan Chain Based Side Channel Attack On Aes

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dc.contributor.author SUPERVISOR DR. MUHAMMAD YASIN, NS MUHAMMAD FAISAL ZAFAR PC ABDULLAH BIN NISAR NS MAHAM PARVEZ PC ZOHA NASEEM
dc.date.accessioned 2024-07-03T09:49:35Z
dc.date.available 2024-07-03T09:49:35Z
dc.date.issued 2024
dc.identifier.other DE-COMP-42
dc.identifier.uri http://10.250.8.41:8080/xmlui/handle/123456789/44465
dc.description Supervisor DR. MUHAMMAD YASIN en_US
dc.description.abstract This report unveils a severe security threat for cryptographic integrated circuits (ICs) that use scan-based design-for-testability (DFT) techniques. Scan chains significantly improve manufacturing test efficiency while also inadvertently creating a seemingly secure-bydesign covert channel for key extraction. Prior differential scan attacks typically focus on some special hamming weight patterns, and thus their effectiveness can be reduced by design tweaks. In this report, we introduce the Co-relation Scan Attack (COSA), a generic attack framework that overcomes these limitations and works equally well irrespective of hamming weight distribution. This increases the attack surface by a significant amount, requiring them to implement a much more secure security measure in design. Results: We have implemented COSA and shown via experiments the practicality of recovering AES secret keys with an average time of 22 us on a standard desktop machine. Its very fast key extraction underlines the need of increased awareness within users and better-planned countermeasures by IC designers en_US
dc.language.iso en en_US
dc.publisher College of Electrical & Mechanical Engineering (CEME), NUST en_US
dc.title Scan Chain Based Side Channel Attack On Aes en_US
dc.type Project Report en_US


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