Detection of Parametric Hardware Trojans

Abstract

The eminence of third-party-foundry business practice saves a lot of cost by utilizing the economy of scale. While this practise saves a lot of cost by utilizing the economy of scale, it exposes these chips to various threats that includes insertion of hardware trojan. ICs form the core for the computing and communication systems used in contemporary personal, commercial and government affairs. The repercussions are critical, considering the penetration of technology in military and commercial sectors. For this reason, granting trust in presence of unreliable third-party fabrication has become a major challenge. Hardware trojans and, consequently, defence-in-depth has therefore drawn a great attention in research and development programs. The scope of this thesis is also to form a baseline for hardware trojan detection. To study the unexpected behaviour of ICs because of trojans, a taxonomy of different types of hardware trojans based on their various attributes is proposed. The research is focused on Parametric Hardware Trojans (PHTs), the stealthiest emergence of HTs. It is very sophisticated trojan and it bypasses most of the widely used detection techniques. Detection of PHTs is therefore considered as a challenge and this is taken as an objective of this research. The research not only comprehends the detection techniques suitable for PHTs but also analyses the effectiveness of Side Channel Analysis (SCA) to detect PHTs. SCA is used widely for attacking and compromising the security. In this research, this concept is conceived with a detective and defensive approach. This research also contributes in the prevention and countermeasure techniques for PHTs. The proposed techniques can be used as a stand alone or as a combination, depending on the level of required security. For this, a high profile target was studied that is Random Number Generator (RNG) of Intel’s Ivy Bridge microprocessor. The concept of PHT is concieved from (1). To detect this trojan, effectiveness of SCA is analysed. The trojan is visualized at Hardware Description Language (HDL) level and implemented on FPGA board. Different limitations were observed while performing SCA over FPGA development kits and two detection models were proposed in MATLAB and its effectiveness was analysed.