IMPLEMENTATION OF VOICE COMPRESSION ALGORITHM ON FPGA FOR WIRELESS NETWORKING

Abstract

In the fast-going environment of digital and wireless communica tions, efficient data transmission plays a critical role. It helps in en hancing the network performance along with reducing the operational costs. The implementation of voice compression algorithm on field programmable gate array (FPGA) allows both performance and effi ciency hence, the core objective to design and develop a real time, low latency voice compression system on FPGA. The field programmable gate array (FPGA) allows parallel processing hence increasing the ca pability of working algorithm. The successful deployment of this voice compression algorithm on FPGA has the potential to revolutionize the communication systems domain, making it efficient and performance oriented at the same time.