Abstract:
With the advancement of technology, algorithms are becoming more
and more complex because of their generic nature. In the early days design of
hardware was done at transistor level. But due to the development of VLSI
platforms, the design phase was shifted to Hardware Description Languages
e.g Verilog and VHDL. Now due to the introduction of nano-technology and
complex digital signal processing applications, the market is in search of
software with even higher level of abstraction. The basic aim is to make
software engineers able to synthesize hardware with focus on optimality in
area on chip.
This project is entirely a research and design project putting forward
solution for the forth-mentioned market trend and its implementation.
The higher level of abstraction is achieved by developing a tool for C
level hardware design. The ANSI C to hardware conversion is ideal for
hardware design and synthesis for the following reasons:
Algorithms are easy to build and debug in ANSI C then in Verilog and
VHDL Many algorithms already exist in ANSI C As the development in
ANSI C is easy and fast, its conversion directly into hardware will reduce
the development cycle and time to launch new product in market
Our objective is to enable synthesis of optimum and efficient hardware right
from the programmer's hand, who does not possess knowledge of the
hardware architecture, chip design and gate layout.
