FPGA Based hardware firewall

Abstract

The basic aim of the project is to design and implement a Hardware Firewall which would enable user to secure a communication Network. The hardware firewall will use packet filtering technique to examine the header of a packet to determine its source and destination. This information will be compared to a set of predefined or user-created rules that will determine whether the packet is to be forwarded or dropped. Packet-filtering firewalls provide a reasonable amount of protection for a network with minimum complications. Packet-filtering rules can be extremely intuitive and thus easy to set up.