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Design and FPGA based implementation of barker demodulation block and CCK correlator block for DSSS technique in IEEE 802.11g
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| dc.contributor.author | Janjua, Shahnawaz | |
| dc.date.accessioned | 2022-06-20T05:06:20Z | |
| dc.date.available | 2022-06-20T05:06:20Z | |
| dc.date.issued | 2009 | |
| dc.identifier.uri | http://10.250.8.41:8080/xmlui/handle/123456789/29685 | |
| dc.description | SEECSP00796 | en_US |
| dc.description.sponsorship | Dr. N. D. Gohar | en_US |
| dc.language.iso | en | en_US |
| dc.publisher | School of Electrical Engineering and Computer Science | en_US |
| dc.subject | Design and FPGA based implementation of barker demodulation block and CCK correlator block for DSSS technique in IEEE 802.11g | en_US |
| dc.title | Design and FPGA based implementation of barker demodulation block and CCK correlator block for DSSS technique in IEEE 802.11g | en_US |
| dc.type | Thesis | en_US |
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BS [835]