Abstract:
Spin-Transfer Torque Magnetic Random Access Memory (STT-MRAM) has
emerged as a promising technology for future memory systems due to its
non-volatility, high endurance, and low power consumption. However, STT MRAM has limitations in terms of read-disturbance, which can lead to data
errors and affect the reliability and lifetime of the device. This thesis pro poses an architecture-level encoding scheme to mitigate read-disturbance in
STT-MRAM. The proposed scheme is based on an encoding approach that
modifies the data being written to the STT-MRAM to ensure that the prob ability of read-disturbance errors is reduced. The proposed encoding scheme
is evaluated through simulation experiments, and the results demonstrate
significant improvements in the reliability and lifetime of the STT-MRAM
device.
