Abstract:
Memory is an integral part of most digital systems. With over millions of bits packed into
a small silicon footprint it becomes virtually impossible to manually generate memory
arrays. Moreover, as emerging memory technologies are increasingly becoming popular
among researchers there is an ever growing need to integrate large memory arrays in
flexible configurations in a design. The current availability and flexibility of commercial
memory compilers is very restricted thereby limiting the scope of research to simulation
only. This thesis is an effort to create a reusable, portable memory compiler that targets
commercial foundries. This computer aided tool will allow generation and characteri zation of memory arrays for a given specification that are compatible with commercial
EDA tools.
